I/O Memory
The input/output memory is isolated from the main memory. In other words, it can only be accessed using the IN and OUT instructions. When access to an input/output module is required, the CPU activates the IO/M signal, which causes a chip select to read the address from the address bus and send the read/write signal to the corresponding module.
The address range for the input/output memory is from 00h to FFh (256 addresses).
I/O Registers
These are the input/output registers available in the simulator, all 8 bits wide:
| Address | Name | Module |
|---|---|---|
10h | CONT | Timer |
11h | COMP | Timer |
20h | EOI | PIC |
21h | IMR | PIC |
22h | IRR | PIC |
23h | ISR | PIC |
24h | INT0 | PIC |
25h | INT1 | PIC |
26h | INT2 | PIC |
27h | INT3 | PIC |
28h | INT4 | PIC |
29h | INT5 | PIC |
2Ah | INT6 | PIC |
2Bh | INT7 | PIC |
30h | PA | PIO |
31h | PB | PIO |
32h | CA | PIO |
33h | CB | PIO |
40h | DATA | Handshake |
41h | STATE | Handshake |